Related article (that was previously discussed on HN): https://spectrum.ieee.org/semiconductors/devices/a-better-way-to-measure-progress-in-semiconductors https

Related article (that was previously discussed on HN): https://spectrum.ieee.org/semiconductors/devices/a-better-way-to-measure-progress-in-semiconductors https://spectrum.ieee.org/semiconductors/devices/a-better-wa... It covers the LMC proposal mentioned in this article, but also another proposal more similar to the current node naming, but instead of using the gate length, using a combination of gate pitch (minimum distance between two transistors) and metal pitch (minimum distance between two wires).