4 ms·

Why do you think it might not be a good thing in practice?

annoyingnoob 5y ago
> That could look like pools of compute, memory, and peripheral functionality distributed throughout the system; connected over long distances with optical links, software-defined infrastructure, and high-speed networking. Latency comes to mind. But also how many people does it take to troubleshoot a system where the compute, memory, and storage are all in different physical locations? Building a distributed system seems fragile.
- sumtechguy 5y ago
  Very much so. It also creates some interesting possibilities. Such as a memory unit that can be shared between a few computers and then reconfigured as needed. This would be useful in such things as VMs and docker units and dynamic scaling. They probably would not be located in different buildings. But probably in the same rack or adjacent. You can see some of this sort of thing with software defined networks and storage pools.
  - deburo 5y ago
    Unrelated to photonics, but this: >memory unit that can be shared between a few computers and then reconfigured as needed It reminds me of reading recently about Compute Express Link, when Micron announced they were moving away from 3D Xpoint and would focus on CXL. https://blocksandfiles.com/2021/03/25/cxl-and-the-developing-memory-hierarchy/ https://blocksandfiles.com/2021/03/25/cxl-and-the-developing...
    - sumtechguy 5y ago
      Yeah that is an interesting gamble on the part of Micron (not a bad one at this point). In they are betting xpoint will not deliver the price points needed to compete with DRAM, might as well put a node in the same place with similar latency as xpoint. Intel and Micron were seeing xpoint as a layer in memory. With DRAM being a L4 cache to the data (or some mix). The problem is keeping xpoint prices bellow DRAM yet high enough to keep the thing profitable. Fiberoptic links between the two nodes at this point would probably really complicate things (at this point) as the tech just is not there yet. But if they can get it to work the latency should overcome some of the issues of a secondary node holding shared memory. All of that because Intel is having trouble moving to 11nm. All of their features were tied to that node process (tick tock). It is why we are seeing Intel back features from the 11nm node back up to 14. As their competitors are not sitting on 2017 tech and milking it. They are moving to the new stuff. xPoint was interesting 5 years ago. When they could make a 128GB stick for half the price of DRAM one. But they did not have the pins on the chip to support the larger workloads. DRAM caught up in size to overcome it. They have them now. But now that config is not as interesting.
  - annoyingnoob 5y ago
    Modern approach to mainframe-style computers, I guess. Where everything is a shareable resource and physical location is abstracted away.

> That could look like pools of compute, memory, and peripheral functionality distributed throughout the system; connected over long distances with optical links, software-defined infrastructure, and high-speed networking. Latency comes to mind. But also how many people does it take to troubleshoot a system where the compute, memory, and storage are all in different physical locations? Building a distributed system seems fragile.

sumtechguy 5y ago
Very much so. It also creates some interesting possibilities. Such as a memory unit that can be shared between a few computers and then reconfigured as needed. This would be useful in such things as VMs and docker units and dynamic scaling. They probably would not be located in different buildings. But probably in the same rack or adjacent. You can see some of this sort of thing with software defined networks and storage pools.
- deburo 5y ago
  Unrelated to photonics, but this: >memory unit that can be shared between a few computers and then reconfigured as needed It reminds me of reading recently about Compute Express Link, when Micron announced they were moving away from 3D Xpoint and would focus on CXL. https://blocksandfiles.com/2021/03/25/cxl-and-the-developing-memory-hierarchy/ https://blocksandfiles.com/2021/03/25/cxl-and-the-developing...
  - sumtechguy 5y ago
    Yeah that is an interesting gamble on the part of Micron (not a bad one at this point). In they are betting xpoint will not deliver the price points needed to compete with DRAM, might as well put a node in the same place with similar latency as xpoint. Intel and Micron were seeing xpoint as a layer in memory. With DRAM being a L4 cache to the data (or some mix). The problem is keeping xpoint prices bellow DRAM yet high enough to keep the thing profitable. Fiberoptic links between the two nodes at this point would probably really complicate things (at this point) as the tech just is not there yet. But if they can get it to work the latency should overcome some of the issues of a secondary node holding shared memory. All of that because Intel is having trouble moving to 11nm. All of their features were tied to that node process (tick tock). It is why we are seeing Intel back features from the 11nm node back up to 14. As their competitors are not sitting on 2017 tech and milking it. They are moving to the new stuff. xPoint was interesting 5 years ago. When they could make a 128GB stick for half the price of DRAM one. But they did not have the pins on the chip to support the larger workloads. DRAM caught up in size to overcome it. They have them now. But now that config is not as interesting.
- annoyingnoob 5y ago
  Modern approach to mainframe-style computers, I guess. Where everything is a shareable resource and physical location is abstracted away.