3 ms·
They were not using ARM, but Tensilica chips with Xtensa instruction set - https://en.wikipedia.org/wiki/Tensilica#Xtensa_instruction_set https://en.wikipedia.o
by stickac 5y ago
They were not using ARM, but Tensilica chips with Xtensa instruction set - https://en.wikipedia.org/wiki/Tensilica#Xtensa_instruction_set https://en.wikipedia.org/wiki/Tensilica#Xtensa_instruction_s...
- weitzj 5y agoThe -C3, -C6 line is RISC V
- lights0123 5y ago> were