Ok. So translated to CPU terms there would seem to be 80 cores ("SPs") in a V100, that each can do up to 64-lane SIMD/SIMT with FP32 data. [1] (SIMT for NVidia

Ok. So translated to CPU terms there would seem to be 80 cores ("SPs") in a V100, that each can do up to 64-lane SIMD/SIMT with FP32 data. [1] (SIMT for NVidia seems to be just a programming model that compiles to SIMD instructions[2], a bit like what you get with ispc on CPUs) [1] https://images.nvidia.com/content/volta-architecture/pdf/volta-architecture-whitepaper.pdf https://images.nvidia.com/content/volta-architecture/pdf/vol... pages 17 and 10 [2] https://www.realworldtech.com/forum/?threadid=195094&curpostid=195099 https://www.realworldtech.com/forum/?threadid=195094&curpost...