5 ms·
While my experience is mainly in digital hardware, my tinfoil hat theory as to why the hardware startup scene is so lackluster is because the EDA tools are expe
by Lramseyer 6y ago
While my experience is mainly in digital hardware, my tinfoil hat theory as to why the hardware startup scene is so lackluster is because the EDA tools are expensive hot garbage. Not only are the dev tools cost prohibitive, but so are the necessary analog components like PLLs and PHYs (which are more or less required in pretty much every modern VLSI design.)
The same companies that make the EDA tools also make IP blocks that semiconductor companies purchase, so it's in their best interest to prevent an open source hardware scene from thriving. I get that making masks for a chip is expensive for a startup. But if the design, verification, and layout steps were cheaper and more streamlined, I would bet money that the fab costs would work their way down in clever and creative ways.
- DivisionSol 6y agoI don my tinfoil hat with you. EDA tools are intentionally opaque to maximize IP capture. I have no skin in the game, nor do I have hardware/circuit development experience... But every time I want to dabble as a Hobby-ist it's clear: "You're not allowed to experiment." Starting that train now is quite difficult. Lots of inertia to overcome with pre-existing closed source tools being chosen by default at colleges and companies.
- mhh__ 6y agoGod bless Claire Wolf
- baybal2 6y agoWhile EDAs truly are ridiculous expensive garbage, their cost is a pocket change in the age of billion dollar startups without a selling product. It's just you actually have to make some working product in semiconductors, it's a substantial technical undertaking, and thus a big turn off for the aforementioned billion dollar internet startups.
- monocasa 6y agoThe six figure per seat cost of cadence is a lot to the point of being unobtainable for even early stage of what would become unicorns. It's not like giant checks are generally being written to these startups that have no users and no engineering done yet.
- varispeed 6y agoIsn't that, at least for digital application, many chips can be replaced with FPGA, CPLD or just a good old CPU? Only recently you can see some companies reproducing audio IC from the 80s, but not much of original work. It seems like there is a huge niche in that space, but probably companies think it is too small to be profitable.
- tails4e 6y agoThe EDA tools are often given for almost free to startups, as the vendors recognise startups can't start without them, and if they are too expensive to a fledgling company they are shooting themselves in the foot. Startups get the tools, but not the support. I'm in HW chip design and use EDA tools daily, and while they are not always great, I would not be as concerned about them for a startup as I would getting enough money to create the first prototype, fab costs, lab equipment costs, man years of engineering, and of course the IP.
- monocasa 6y agoYou need the support though to know why the crappy tools are breaking your design and be able to hack around it.
- tails4e 6y agoYes and no, if a startup has experienced designers, they can work around issues. I've often done this and I have access to AEs, as to get an issue resolved externally takes more time than a bit of debug on why the tool is not doing what you want. Rarely is the issue an actual tool bug, but often a tool quirk with some esoteric solution. The issue with most of these EDA tools is their million configuration variables, and that they rarely do something useful out of the box. And experienced designer knows the edges on this and will work fine without support.
- mhh__ 6y agoThe tools are still kind of rubbish in the sense that for many startups in software their edge could literally just be having an extremely good internal development flow whereas EDA stuff seems to be written solely to get from A to B. I haven't seen the deep end of the software as you get closer to the fab, but I'm guessing it's worse.
- tails4e 6y agoA HW startup will not be suddenly successful because of their EDA flow. They could however fail badly if they have their EDA incorrectly setup, as if your chip STA flow was incorrect and you have hold time issues on silicon, you just blew 6 months+ and a few million. It would be critical to have an STA expert for that reason, as well as a solid sign-off process before tape out.