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Does anyone know of a headless “simplistic” simulator that uses input config files to define wiring and then outputs the state after a “clock tick”?
by Donckele 6y ago
Does anyone know of a headless “simplistic” simulator that uses input config files to define wiring and then outputs the state after a “clock tick”?
- sasvari 6y agoBeen a while since I've been running this, but you can patch something together with GHDL [0] (or Xilinx's simulation suite (ISim)). Define your circuit with VHDL/Verilog, create a testbench, run the scripts and export to VCD, and then look at the waveforms with GTKwave [1] or your waveform viewer of choice. [0] http://ghdl.free.fr/ http://ghdl.free.fr/ [1] http://gtkwave.sourceforge.net/ http://gtkwave.sourceforge.net/
- Donckele 6y agoHey, thanks for the reply and I have checked out the links briefly. The programs seem pretty heavyweight to what I’m looking for.
- sasvari 6y agoNot really sure what you mean with heavyweight, but it is simplistic according to your requirement: write input config files (here: in VHDL) for the simulator (ghdl), and then view the output after x clock ticks (with gtkwave).