3 ms·
Interesting that you can implement a TRNG in FPGA synthesized logic. It seems to be sampling the output of the inverter chain not necessarily the jitter? I gues
by stefan_ 6y ago
Interesting that you can implement a TRNG in FPGA synthesized logic. It seems to be sampling the output of the inverter chain not necessarily the jitter? I guess the two are related.
- mkj 6y agoYou might be interested in https://github.com/betrusted-io/betrusted-wiki/wiki/TRNG-characterization#ring-oscillator https://github.com/betrusted-io/betrusted-wiki/wiki/TRNG-cha...