10 ms·
> to lack of documentation about speculation barriers Can you elaborate on this? I was having a look at the M1 instructions here [1] and it seems that they imp
by als0 6y ago
> to lack of documentation about speculation barriers
Can you elaborate on this? I was having a look at the M1 instructions here [1] and it seems that they implement at least one of the barriers, CSDB, which is actually documented by ARM[2].
[1] https://dougallj.github.io/applecpu/firestorm-int.html https://dougallj.github.io/applecpu/firestorm-int.html
[2] https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/CSDB--Consumption-of-Speculative-Data-Barrier- https://developer.arm.com/documentation/ddi0596/2020-12/Base...
- monocasa 6y agoThere's explicit speculation barriers that they document, but they don't tell you what _other_ instructions are speculation barriers simply due to microarchitectural compromises like what you're seeing in this article.
- als0 6y agoOK thanks for clarifying. If there are explicit instructions for blocking speculation then why are you concerned about implicit barriers?
- monocasa 6y agoI'm not. My point is that this article was being unfairly interpreted by the parent as some black mark against x86. There's plenty to hold against it, but not really anything that's documented here. I probably should have made that clearer.
- phkahler 6y agoSeems like implicit undocumented barriers could be used in critical code to provide unfair performance advantage. Maybe. Might be a bit of a stretch.