That's not really how CPUs / RAM have worked since the 1980s. The CPU doesn't operate synchronously out of RAM, fetching data on each clock cycle. It operates f

That's not really how CPUs / RAM have worked since the 1980s. The CPU doesn't operate synchronously out of RAM, fetching data on each clock cycle. It operates from a hierarchical series of on-die caches, with only the L1 cache (typically a few 10s of kilobytes at most) operating close to how you describe. Logic on the CPU will send a series of commands to the RAM (along with data if it's a write), and there will be many commands 'in-flight' around the system at any given time, to hide the relatively high latencies involved (many 10s of nanoseconds). The actual propagation delay (around ~1 nanosecond/foot for cables) barely figures into it. Even the cables can have many 'bits' in flight at a time on them, and typically each 'direction' of the link forwards a clock along with the data (or it's embedded in the data stream) to avoid messy synchronization issues.