In a multi-core system, it may be, since you're not really accessing main memory directly, but you're going through several levels of all kinds of caches, some

In a multi-core system, it may be, since you're not really accessing main memory directly, but you're going through several levels of all kinds of caches, some shared and some not (L1 (instruction, data), L2, L3, TLB, ...), and sometimes competing with devices that access the memory "directly" via DMA.