4 ms·

By using a CISC instead of RISC. But this time instead of designing it for easy human assembly programming like the VAX use instructions that drastically improv

by sprash 6y ago

By using a CISC instead of RISC. But this time instead of designing it for easy human assembly programming like the VAX use instructions that drastically improve memory density, make the life of the branch predictor easier and promote memory locality. Also introduce branchless instructions like cmov.

throwaway81523 6y ago
RISC-V has the C extension (compressed opcodes, similar to Thumb-2) and code density then is comparable to x86 which is the main CISC in use these days.
- sprash 6y ago
  The code density of x86 is not particular great.
  - throwaway81523 6y ago
    Well ok, I'd be interested in seeing a code density comparison between Riscv-IMC and whatever you want to compare it with. Vax density wasn't that great either, though maybe compilers back then weren't as good as now.
    - sprash 6y ago
      RISC-V doesn't even match ARM's levels when pulling extra tricks and extensions designed to improved code density. Other ISA's like AVR32 beat ARM by 50% which means it is more than possible to beat ARM. As I said, RISC-V is designed like a typical early 90s ISA when memory latency was not a concern. It will never be used in high performance general computing for that reason alone.
      - brucehoult 6y ago
        32 bit RISC-V code density is slightly worse than Thumb2, but better than any other 32 bit ISA I'm aware of with similar performance. I don't know much about AVR32 except that it is very dead. Some ISAs designed explicitly for microcontroller use have denser code than RISC-V and Thumb2 on things such as manipulating GPIOs, but not on algorithmic code which makes up the vast majority of any application over a few KB in size. 64 bit RISC-V code density is far better than 64 bit ARM code density, which is similar to AMD64 (i.e. quite a bit bigger than i386) Other than a few extra instructions to zero-extend 32 bit values to 64 bits at times, 64 bit RISC-V and 32 bit RISC-V code are identical in size. High performance general computing these days means 64 bit, and RISC-V has by far the highest code density of any 64 bit ISA.

by sprash 6y ago

throwaway81523 6y ago

RISC-V has the C extension (compressed opcodes, similar to Thumb-2) and code density then is comparable to x86 which is the main CISC in use these days.

sprash 6y ago
The code density of x86 is not particular great.
- throwaway81523 6y ago
  Well ok, I'd be interested in seeing a code density comparison between Riscv-IMC and whatever you want to compare it with. Vax density wasn't that great either, though maybe compilers back then weren't as good as now.
  - sprash 6y ago
    RISC-V doesn't even match ARM's levels when pulling extra tricks and extensions designed to improved code density. Other ISA's like AVR32 beat ARM by 50% which means it is more than possible to beat ARM. As I said, RISC-V is designed like a typical early 90s ISA when memory latency was not a concern. It will never be used in high performance general computing for that reason alone.
    - brucehoult 6y ago
      32 bit RISC-V code density is slightly worse than Thumb2, but better than any other 32 bit ISA I'm aware of with similar performance. I don't know much about AVR32 except that it is very dead. Some ISAs designed explicitly for microcontroller use have denser code than RISC-V and Thumb2 on things such as manipulating GPIOs, but not on algorithmic code which makes up the vast majority of any application over a few KB in size. 64 bit RISC-V code density is far better than 64 bit ARM code density, which is similar to AMD64 (i.e. quite a bit bigger than i386) Other than a few extra instructions to zero-extend 32 bit values to 64 bits at times, 64 bit RISC-V and 32 bit RISC-V code are identical in size. High performance general computing these days means 64 bit, and RISC-V has by far the highest code density of any 64 bit ISA.