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Off the top of my head: 1. RISC-V is completely unencumbered from an IP perspective. There is no possibility of a rightsholder reasserting rights on IP they ha
by duskwuff 6y ago
Off the top of my head:
1. RISC-V is completely unencumbered from an IP perspective. There is no possibility of a rightsholder reasserting rights on IP they had previously released (like what happened with MIPS in 2019).
2. RISC-V is legacy-free. It's an extremely "clean" design, free of weird quirks like the MIPS branch delay slot or SPARC register windows.
3. There are subsets of the RISC-V architecture defined for different sizes of systems, e.g. 32/64 bit versions, an embedded subset with fewer registers, etc. They all share an instruction set and a general architecture, and most compilers can target any subset. Some of the smaller subsets are well within the realm of what a single student can be taught to implement within a semester.
4. Numerous real implementations of RISC-V exist -- both as hardware and HDL -- are being maintained, and the hardware is available on the open market.
- MaxBarraclough 6y ago> There is no possibility of a rightsholder reasserting rights on IP they had previously released (like what happened with MIPS in 2019) What happened with MIPS in 2019? Shouldn't that kind of thing be impossible, the way it's impossible to revoke the GPL licence on software?
- duskwuff 6y ago> What happened with MIPS in 2019? https://www.hackster.io/news/wave-computing-closes-its-mips-open-initiative-with-immediate-effect-zero-warning-e88b0df9acd0 https://www.hackster.io/news/wave-computing-closes-its-mips-...
- musicale 6y agoWow, they really wanted to kill off MIPS, burn their partners, and destroy any remaining credibility, didn't they? Astonishing.