Every 6502 family datasheet that I've read described how many clock cycles an instruction took (since that was critical for some applications), but not what hap

Every 6502 family datasheet that I've read described how many clock cycles an instruction took (since that was critical for some applications), but not what happened during those cycles. That was considered an implementation detail -- and did encompass some externally observable behavior, particularly in terms of what happened on the address/data busses during multi-cycle instructions. Here's a typical datasheet from Rockwell, for example: http://archive.6502.org/datasheets/rockwell_r65c00_microprocessors.pdf http://archive.6502.org/datasheets/rockwell_r65c00_microproc... It's also worth noting that the architecture diagram on page 5 of this document isn't entirely accurate, either. It's closer to a programmer's model than an RTL description of the CPU; some "hidden" registers used during certain operations (like indirect addressing modes) aren't shown.