This series is also amazing: http://labs.domipheus.com/blog/designing-a-cpu-in-vhdl-part-1-rationale-tools-method/ http://labs.domipheus.com/blog/designing-a-cp

This series is also amazing: http://labs.domipheus.com/blog/designing-a-cpu-in-vhdl-part-1-rationale-tools-method/ http://labs.domipheus.com/blog/designing-a-cpu-in-vhdl-part-... In the end he switches to RISC-V as well