Transputer (and later Cell) was a bet that SMP with cache coherency would be too difficult to implement. Here’s a long explanation from Linus Torvalds of why we

Transputer (and later Cell) was a bet that SMP with cache coherency would be too difficult to implement. Here’s a long explanation from Linus Torvalds of why we’re not using architectures like Transputer any more: https://www.realworldtech.com/forum/?threadid=200812&curpostid=200897 https://www.realworldtech.com/forum/?threadid=200812&curpost...