2 ms·
I hope there's a future Pi with more PCIe lanes. 4 would prevent the PCIe bus from being a bottleneck. Or it could have USB 3 and NVMe, maybe even a 2.5GBPS eth
by nfriedly 6y ago
I hope there's a future Pi with more PCIe lanes. 4 would prevent the PCIe bus from being a bottleneck. Or it could have USB 3 and NVMe, maybe even a 2.5GBPS ethernet.