Totally agree. Certain signal processing pipelines that FPGAs are often targeted at map very well to HLS, often with 10x or more code reduction. Production SoCs

Totally agree. Certain signal processing pipelines that FPGAs are often targeted at map very well to HLS, often with 10x or more code reduction. Production SoCs sometimes use similar tech for less power/performance critical blocks. Mentor graphics catapult HLS marketing material contains some note that NVENC on the maxwell generation of Nvidia GPUS was coded in HLS.