The article mentions its the HLS frontend that was open-sourced, not the backend. I see no evidence of any HDL codegen here at all yet. I'll keep looking though

The article mentions its the HLS frontend that was open-sourced, not the backend. I see no evidence of any HDL codegen here at all yet. I'll keep looking though. The full HLS tool that they ship does produce full verilog/vhdl, and doesn't go to the bitstream level. It would be a huge improvement if they would open-source the whole thing. I suspect they will not, however, as code generator likely has a fairly complex FPGA Fabric/Slice timing model used to schedule operations into clocks, and that is something they would probably consider proprietary. Hopefully they can strip out those bits out and release the rest.