Part of joining RISC-V International is signing a document irrevocably certifying that RISC-V doesn't infringe any of your patents, so that door is definitely c

Part of joining RISC-V International is signing a document irrevocably certifying that RISC-V doesn't infringe any of your patents, so that door is definitely closed for MIPS now anyway. It is a little weird that there is an actual preference in proposing instructions for RISC-V extensions to demonstrate that the instruction was patented but the patent has expired, or at least that the instruction was publicly documented in some ISA at least a couple of decades ago. By and large, RISC-V is not trying to be novel, but to bring together and simplify established best practice. I did invent what is believed to be an entirely novel instruction for the RISC-V B extension: GORC. The other instruction GORC shares circuitry with, GREV, is also believed to not have been implemented in an ISA before, though it has been proposed in the literature.