5 ms·
It memory on a SiP. Taking a quick look at an i9 9900 ($382 for chip alone) it supports DDR4-2666. i9-10900T runs at 2933 - $400 for chip alone. Apple is runn
by random5634 6y ago
It memory on a SiP.
Taking a quick look at an i9 9900 ($382 for chip alone) it supports DDR4-2666. i9-10900T runs at 2933 - $400 for chip alone.
Apple is running their stuff at 4100 or something. So that looks faster. And the mac mini costs $700 including the insane apple margins?
Can you spec out the $700 machine on pc parts picker that shows that the M1 is nothing special? One with faster or equivalent memory.
Calling the M1 and $700 machine a HEDT?? Huh? Apple is going to sell these things by the truckload.
- runjake 6y agoMy RAM on my 8700K system is running at 3200 mhz (XMP I). I imagine the 9900 can do at least that.
- square_usual 6y agoUsing XMP may void your warranty: https://community.intel.com/t5/Processors/XMP-Warranty-void/m-p/1196487/highlight/true#M45219 https://community.intel.com/t5/Processors/XMP-Warranty-void/... This may have changed since then (Mid-2020). Gamers Nexus have done an undercover sting where they found it was possible for a support agent to reject a warranty request on the basis of XMP: https://www.youtube.com/watch?v=I2gQ_bOnDx8&t=1155 https://www.youtube.com/watch?v=I2gQ_bOnDx8&t=1155
- rayiner 6y agoThe i9’s slow supported memory is a product of that being Intel’s 14nm line which uses the same architecture released in 2015. The 10nm core chips use LPDDR4x, just like the M1. The $999 Surface Laptop 3 uses it at 3733 MT/s, just a bit slower than the M1: https://www.anandtech.com/show/14933/microsoft-announces-surface-laptop-3-family-now-including-15inch-models-custom-amd-ryzen-apus https://www.anandtech.com/show/14933/microsoft-announces-sur.... That speed of memory is supported on the lowest end 10nm mobile i3, which appears in sub-$300 NUCs available since 2019. The M1 is a great chip, but that has nothing to do with the location of the memory. LPDDR4x-4267 is a standard memory type. Kudos to Apple for using the highest commonly available speed bin, but it’s a standard speed bin for that type of memory.
- random5634 6y agoYou claim it’s common but I haven’t seen that speed out there a lot. And def not in a package close to apples.
- rowanG077 6y agoIt's very common for high-end ultrabooks. Just look at the XPS 13 it runs at 4267. https://www.dell.com/ph/p/xps-13-9310-2-in-1-laptop/pd?ref=PD_OC#:~:text=Memory&text=Note%3A%20When%20configured%20with%20Intel,memory%20speed%20of%204267%20MHz https://www.dell.com/ph/p/xps-13-9310-2-in-1-laptop/pd?ref=P.... exactly the same as the Apple M1. It's just the most common high-end memory speed currently nothing special about it.
- Goz3rr 6y agoMost i9 9900 chips will happily run DDR4-4266 as well. The reason Intel only lists DDR4-2666 has to do with JEDEC standards and overclocking reasons. Also note frequency is only part of the whole picture. CAS latency is important as well, which is much higher with Apple.
- GeekyBear 6y agoI'd say that having massive low latency caches on die plays a larger role. >On the cache hierarchy side of things, we’ve known for a long time that Apple’s designs are monstrous, and the A14 Firestorm cores continue this trend. Last year we had speculated that the A13 had 128KB L1 Instruction cache, similar to the 128KB L1 Data cache for which we can test for, however following Darwin kernel source dumps Apple has confirmed that it’s actually a massive 192KB instruction cache. That’s absolutely enormous and is 3x larger than the competing Arm designs, and 6x larger than current x86 designs, which yet again might explain why Apple does extremely well in very high instruction pressure workloads, such as the popular JavaScript benchmarks. The huge caches also appear to be extremely fast – the L1D lands in at a 3-cycle load-use latency. AMD has a 32KB 4-cycle cache, whilst Intel’s latest Sunny Cove saw a regression to 5 cycles when they grew the size to 48KB. https://www.anandtech.com/show/16226/apple-silicon-m1-a14-deep-dive/2 https://www.anandtech.com/show/16226/apple-silicon-m1-a14-de...
- hajile 6y agoThat cache is that big because the decode and ROB are so wide. If AMD or Intel's current designs widened the L1, it wouldn't make a difference. In fact, AMD reduced L1 cache size from 64k to 32k from Zen 1 to Zen 3. x86 needs to find a way to scale decoders without blowing the power budget. Given that the decoders are already bigger than the integer units, I suspect that will be a hard thing to do.
- random5634 6y agoI get crashes with XMP, usually right at worst possible time on a zoom call where I am presenting! And saying users should overclock just seems weird, apple works out of the box. For whatever reason, the overall memory system on the M1 systems just seems better than intel. I really wish I could follow more details from on-die cache to how memory is actually loaded / unloaded to speeds, but every time I've looked at it a little it just seems the M1 / Apple are doing it better across the whole stack.