Somebody already made a comment, which seems to be getting ignored: https://github.com/rust-lang/rust/issues/27060#issuecomment-123219686 https://github.com/ru

Somebody already made a comment, which seems to be getting ignored: https://github.com/rust-lang/rust/issues/27060#issuecomment-123219686 https://github.com/rust-lang/rust/issues/27060#issuecomment-... Basically, Intel goofed back when SSE was first introduced, and some compilers (including both gcc and llvm) got tripped up. Intel made two instructions for loading SSE registers, a normal one and one that would take alignment faults. There was the suggestion that the one with alignment faults would perform better, so people used it. In later processors, the tiny difference went away. So now you have a useless instruction supported by the hardware, and it is getting emitted by LLVM. All the other instructions that could be emitted by llvm, and all the instructions that should be emitted by llvm, do not take alignment faults.