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That is a mistake. Architectures are being updated to support unaligned access. MIPS, PowerPC, and ARM have all been updated. The machines that can't handle una
by souprock 6y ago
That is a mistake. Architectures are being updated to support unaligned access. MIPS, PowerPC, and ARM have all been updated. The machines that can't handle unaligned access are going the way of machines with sign-magnitude integers, trap representations, 9-bit bytes, base-16 floating-point, and so many other terrible things that must have seemed like good ideas at the time.
- kibwen 6y agoMisbehavior manifests even on x86, see the tracking https://github.com/rust-lang/rust/issues/27060 https://github.com/rust-lang/rust/issues/27060 for examples. If you have more information, please leave a comment there.
- souprock 6y agoSomebody already made a comment, which seems to be getting ignored: https://github.com/rust-lang/rust/issues/27060#issuecomment-123219686 https://github.com/rust-lang/rust/issues/27060#issuecomment-... Basically, Intel goofed back when SSE was first introduced, and some compilers (including both gcc and llvm) got tripped up. Intel made two instructions for loading SSE registers, a normal one and one that would take alignment faults. There was the suggestion that the one with alignment faults would perform better, so people used it. In later processors, the tiny difference went away. So now you have a useless instruction supported by the hardware, and it is getting emitted by LLVM. All the other instructions that could be emitted by llvm, and all the instructions that should be emitted by llvm, do not take alignment faults.
- kibwen 6y agoI don't believe they're being ignored, however, I encourage you to comment if you have something to add, even if it is just to reiterate that comment in a modern context.