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NASA’s latest Mars rover has the same processor as an iMac from 1998

4 points by em3rgent0rdr 6y ago

chovybizzass 6y ago
why is it so old?
- umvi 6y ago
  The problem with using cutting edge hardware is that when you put it on another planet and a new issue with the hardware is discovered, you are hosed.
  - injb 6y ago
    Still, it's a little surprising that it's the same one used in the Curiosity Rover, which launched around 9 years ago iirc. Obviously the Curiosity rover didn't use the same one as the one from 9 years before that.
    - em3rgent0rdr 6y ago
      But it has proven itself and is plenty fast. You only need so much compute power to move your wheels and take photos.
- em3rgent0rdr 6y ago
  Article mentions two reasons: it's a proven design that is reliable. And it has been radiation hardened: > Mars’ atmosphere offers far less protection from harmful radiation and charged particles than Earth’s atmosphere. A bad burst of radiation can badly wreck the sensitive electronics of a modern processor — and the more complex the chip, the more can go wrong. Plus, at 138 million miles away, it’s not like NASA can just swap out the processor if things go sideways. > To make the system even more durable, the PowerPC 750 chip in Perseverance is a little different than the one in the old iMacs. It’s technically a RAD750 chip, a special variant that’s hardened against radiation and costs upwards of $200,000
em3rgent0rdr 6y ago
200 MHz is plenty fast if you aren't running The Latest JavaScript Framework to move your wheels and take photos.
ggm 6y ago
Processor (singular) surely is wrong? wouldn't it be a common architecture with several, many, perhaps even lots? Sure, there's a power budget, but that's manageable. A lazy comment, I know I could check. There's the complexity problem, but inherently is a space device heading to a single CPU execution model? I would have expected some variant of TMR for rad error detection and sw update methods which only do one at a time. TMR is standard in flight control logic. And, what's the emergency backup cpu? The one which halts, points a radio antenna at a fixed point known to intersect the earth in some cycle time including months, and sits at the bootloader waiting for an instruction stream...

4 points by em3rgent0rdr 6y ago

chovybizzass 6y ago

why is it so old?

umvi 6y ago
The problem with using cutting edge hardware is that when you put it on another planet and a new issue with the hardware is discovered, you are hosed.
- injb 6y ago
  Still, it's a little surprising that it's the same one used in the Curiosity Rover, which launched around 9 years ago iirc. Obviously the Curiosity rover didn't use the same one as the one from 9 years before that.
  - em3rgent0rdr 6y ago
    But it has proven itself and is plenty fast. You only need so much compute power to move your wheels and take photos.
em3rgent0rdr 6y ago
Article mentions two reasons: it's a proven design that is reliable. And it has been radiation hardened: > Mars’ atmosphere offers far less protection from harmful radiation and charged particles than Earth’s atmosphere. A bad burst of radiation can badly wreck the sensitive electronics of a modern processor — and the more complex the chip, the more can go wrong. Plus, at 138 million miles away, it’s not like NASA can just swap out the processor if things go sideways. > To make the system even more durable, the PowerPC 750 chip in Perseverance is a little different than the one in the old iMacs. It’s technically a RAD750 chip, a special variant that’s hardened against radiation and costs upwards of $200,000

em3rgent0rdr 6y ago

200 MHz is plenty fast if you aren't running The Latest JavaScript Framework to move your wheels and take photos.

ggm 6y ago

Processor (singular) surely is wrong? wouldn't it be a common architecture with several, many, perhaps even lots? Sure, there's a power budget, but that's manageable. A lazy comment, I know I could check. There's the complexity problem, but inherently is a space device heading to a single CPU execution model? I would have expected some variant of TMR for rad error detection and sw update methods which only do one at a time. TMR is standard in flight control logic. And, what's the emergency backup cpu? The one which halts, points a radio antenna at a fixed point known to intersect the earth in some cycle time including months, and sits at the bootloader waiting for an instruction stream...