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If you're getting into this stuff a great resource I found is the ZipCPU Tutorial [0] by Dan Gisselquist. The tutorial covers both Verilog design and Formal Ver
by abetlen 6y ago
If you're getting into this stuff a great resource I found is the ZipCPU Tutorial [0] by Dan Gisselquist. The tutorial covers both Verilog design and Formal Verification methods. It uses open source tools like Verilator and SymbiYosys so getting started is pretty easy.
[0]: https://zipcpu.com/tutorial/ https://zipcpu.com/tutorial/
- anon2718 6y agoI just want to share with people that in no uncertain terms Dan Gisselquist\ZipCPU is transphobic and many members of the Open FPGA community are not a fan of him. [0]: https://twitter.com/whitequark/status/1333484002708254728 https://twitter.com/whitequark/status/1333484002708254728 [1]: https://zipcpu.com/blog/2020/11/26/zipcpu-biz.html https://zipcpu.com/blog/2020/11/26/zipcpu-biz.html