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In the "How CMOS logic is implemented" section, the text about the NMOS transistor says the source and drain are "P+ silicon", but the diagram labels them as "n
by stevefolta 6y ago
In the "How CMOS logic is implemented" section, the text about the NMOS transistor says the source and drain are "P+ silicon", but the diagram labels them as "n+ diffusion". Is "P+ silicon" somehow the same thing as "n+ diffusion"?
- kens 6y agoOops, thanks for pointing that out. It's now fixed.
- stevefolta 6y agoThanks! It seemed confusing, but I didn't know enough about the terminology of silicon doping to know if it was correct. I probably should by now, I've been enjoying your teardowns for quite some time!