If it interests you - stated at the bottom of the press release, they appear to be presenting a conference accepted paper on this. Looking at the ISSCC program

If it interests you - stated at the bottom of the press release, they appear to be presenting a conference accepted paper on this. Looking at the ISSCC program, I presume this is what they're talking about: "A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications" [1]. I suspect this is where there will be a deep dive into the gory technical details of the architecture and performance. It's tomorrow so it won't be a long wait. [1] https://submissions2.mirasmart.com/ISSCC2021/PDF/ISSCC2021AdvanceProgram.pdf https://submissions2.mirasmart.com/ISSCC2021/PDF/ISSCC2021Ad... (p 38)