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This is very interesting stuff. I'd love for these kind of chips to be sold in a form of a coprocessor cards for PCs for example. For some type of servers and o
by FpUser 6y ago
This is very interesting stuff. I'd love for these kind of chips to be sold in a form of a coprocessor cards for PCs for example. For some type of servers and other uses it'd be a blessing.
- jpm_sd 6y agoThose are called GPUs! Or, if you like, GPGPUs. Readily available in The Cloud(TM) and everything. https://docs.aws.amazon.com/dlami/latest/devguide/gpu.html https://docs.aws.amazon.com/dlami/latest/devguide/gpu.html
- FpUser 6y agoNope. GPUs are SIMD. KiloCore is however 1000 totally independent cores.
- captainbland 6y agoMy understanding is that on Nvidia cards, each SM is basically an independent SIMD processor. So a RTX 3090 is like a processor with 82 independent but super-wide cores. I think the truth is actually even more complicated still with multiple warps being able to execute on a single SM with some memory subsystem limitations but it's something like that. The equivalent is true with AMD GPUs, too, just substitute the terminology where appropriate. Either way still not close to 1000 independent cores.
- desertrider12 6y agoIn a way, there are many more independent cores in an Nvidia GPU than #SMs, since the SIMD (warp) is only 32 threads wide, and >1k threads can be active at a time per SM. Each warp has its own independent program counter. So if you really wanted to, you could have a kernel with blocks that are Nx32, and code like: if(blockIdx.x == 0) doThing1(); else if(blockIdx.x == 1) doThing2(); ... etc., and the doThings could run at the same time, even on the same SM. Not super practical but it's allowed.
- SuchAnonMuchWow 6y agoIt does exist in various forms. One I'm familiar with is Kalray MPPA (massively parallel processor array): https://www.kalrayinc.com/technology/ https://www.kalrayinc.com/technology/ Their current generation of processors have 80 cores exposed to the userspace (the previous one had 256), and they are mainly used as PCIe acceleration boards for all kinds of applications. But as another poster said, the difficulty with those kinds of architecture is the memory hierarchy: you don't want all the cores to access the DDR directly, as that would be a massive bottleneck. And this becomes a larger issue as you increase the number of cores.