The most important practical difference is that Power PC is not multi-copy atomic. That is to say, "[the PPC] memory system does not guarantee that a write beco

The most important practical difference is that Power PC is not multi-copy atomic. That is to say, "[the PPC] memory system does not guarantee that a write becomes visible to all other hardware threads at the same time point." AArch64 does guarantee this property, although it was not documented as doing so in the first release of its specification. For this reason PPC has to emit some extra StoreLoad memory fences. (See "A Tutorial Introduction to the ARM and POWER Relaxed Memory Models" by Luc Maranget, Susmit Sarkar and Peter Sewell, but be aware that the AArch64 specification has changed since that paper was written. Our work has resulted in Arm clarifying the AArch64 specification in a couple of places, for which I'm grateful.)