Right, memory controllers wouldn't be able to fully leverage SRAM DIMMs right out of the gate, but they would be able to partially leverage them right out of th

Right, memory controllers wouldn't be able to fully leverage SRAM DIMMs right out of the gate, but they would be able to partially leverage them right out of the gate and fully leverage them within a JEDEC cycle. It has been multiple JEDEC cycles since over-provisioning became common, so I suspect there must be something else preventing this. SRAM costs way more, but afaik that's an artifact of market size, not fundamental. Hence the 1T1C vs 6T comparison to tease out the fundamental cost difference, which looks to be not worse than 3x-6x more expensive, which would put SRAM DIMMs will within reach. I lean on heinously expensive SRAM in my own embedded designs and would really like to see some market scale drive down those costs!