4 ms·
i appreciate the perspective. with Asperger's, i'm just literal and up-front. i do make it clear that Bob Goudriaans is a Chartered Account, specialising in I
by lkcl 6y ago
i appreciate the perspective. with Asperger's, i'm just literal and up-front. i do make it clear that Bob Goudriaans is a Chartered Account, specialising in International Tax Law. perhaps i should also mention that NLnet has been operating for 18 years, now?
no i didn't go into heavy details on the internal architecture, i did the study (with help from Mitch Alsup) on OoO for 5 months straight, back at the beginning of 2019. when he explained how easy it is to do multi-issue if you use Unary (bit-level) encoding on the Dependency Matrices, i went, "ok that's it, we're using that" :)
what the plan is, is to do instead of big.LITTLE, to do "long.FAT" :)
by that i mean, we will have one core that is high multi-issue and high clock rate, but the rest of the cores are MASSIVE on SIMD engines but light on issue (single or dual).
all still SMP, but some cores just absolute processing Monsters.
now, we'll still need a separate Texture Cache (in addition to I-Cache and D-Cache) because texture interpolation, we'll still need a pixel tile memory area, and so on
but we want to see how far we can get and still not have everything shipped over to a completely separate processor. that is madness, the driver development alone having to contain a full-on RPC mechanism. no wonder latency on GPU Shader execution is so bad on commercial CPUs.