Amusingly, things sort of went the other way in microcontroller land. You had SPI, which has a clock and data pin. That got faster and faster. Then there was Q

Amusingly, things sort of went the other way in microcontroller land. You had SPI, which has a clock and data pin. That got faster and faster. Then there was QSPI (quad SPI) with four data pins, so you could shovel more data per clock, e.g. when loading an initial FPGA configuration, or when a fast CPU wanted to XIP from external flash. Now apparently there's Octal SPI? Which is... arguably a parallel bus!