4 ms·

What are the limits for the number of layers? 176 seems like a large enough number to believe that a few thousands are a possibility. Is the tech any close to a

What are the limits for the number of layers? 176 seems like a large enough number to believe that a few thousands are a possibility. Is the tech any close to a bottleneck, or they will keep growing them up?

wtallis 6y ago
The biggest limiting factor is the ability to etch deep holes with a high aspect ratio. Shrinking individual memory cells along any axis is of limited use (fewer electrons means less durability), so you can't make layers much thinner. Making holes wider can get you more layers, but isn't really a net win for total density. So far, nobody has started stacking more than two decks of layers, so I don't know if we have good data on how cost and yield scale when going all-out on string stacking to reach extreme layer counts. As an alternative, there's R&D into using wider holes, and then splitting the vertical channels in half, giving you two semicircular memory cells per layer rather than one circular cell. There's also a need to keep shrinking the peripheral circuitry as the number of memory cells stacked above each mm^2 of buffers and charge pumps keeps growing.
- baybal2 6y ago
  Are you working in this field?
  - ksec 6y ago
    Dont think he is since he has a Full Time Job Working in Anandtech.
    - wtallis 6y ago
      Technically part-time, paid as a freelancer. Only two or three of the senior editors are on salary. It's not a lucrative line of work, but most of the time it's pretty fun.
      - ksec 6y ago
        Oh wow. The quality is absolutely amazing though. Thank You. While there are less content to write purely just on DRAM, NAND and storage, some of those reporting still takes a long time to investigate and write. Never thought it was freelance.
  - wtallis 6y ago
    I've been reporting on it for the past 5 years, including a recent interview with one of Micron's lead engineers about their 176L NAND, which I haven't written up and published yet. https://www.anandtech.com/Author/182 https://www.anandtech.com/Author/182
    - scns 6y ago
      Thank you for your work. I enjoy the quality of Anandtech's reporting and am totally fine with you guys taking your time to do a good job.
ncsd 6y ago
One limiting factor as the string gets too long is resistance becomes too large. This is the same reason the 2D NAND string is at 128. Maybe certain material breakthroughs will change that
- baybal2 6y ago
  Do you work on memory devices?
dehrmann 6y ago
I know nothing about making chips, but at what point, or for what type of chip, does the heat generated become an issue?

wtallis 6y ago

The biggest limiting factor is the ability to etch deep holes with a high aspect ratio. Shrinking individual memory cells along any axis is of limited use (fewer electrons means less durability), so you can't make layers much thinner. Making holes wider can get you more layers, but isn't really a net win for total density. So far, nobody has started stacking more than two decks of layers, so I don't know if we have good data on how cost and yield scale when going all-out on string stacking to reach extreme layer counts. As an alternative, there's R&D into using wider holes, and then splitting the vertical channels in half, giving you two semicircular memory cells per layer rather than one circular cell. There's also a need to keep shrinking the peripheral circuitry as the number of memory cells stacked above each mm^2 of buffers and charge pumps keeps growing.

baybal2 6y ago
Are you working in this field?
- ksec 6y ago
  Dont think he is since he has a Full Time Job Working in Anandtech.
  - wtallis 6y ago
    Technically part-time, paid as a freelancer. Only two or three of the senior editors are on salary. It's not a lucrative line of work, but most of the time it's pretty fun.
    - ksec 6y ago
      Oh wow. The quality is absolutely amazing though. Thank You. While there are less content to write purely just on DRAM, NAND and storage, some of those reporting still takes a long time to investigate and write. Never thought it was freelance.
- wtallis 6y ago
  I've been reporting on it for the past 5 years, including a recent interview with one of Micron's lead engineers about their 176L NAND, which I haven't written up and published yet. https://www.anandtech.com/Author/182 https://www.anandtech.com/Author/182
  - scns 6y ago
    Thank you for your work. I enjoy the quality of Anandtech's reporting and am totally fine with you guys taking your time to do a good job.

ncsd 6y ago

One limiting factor as the string gets too long is resistance becomes too large. This is the same reason the 2D NAND string is at 128. Maybe certain material breakthroughs will change that

baybal2 6y ago
Do you work on memory devices?

dehrmann 6y ago

I know nothing about making chips, but at what point, or for what type of chip, does the heat generated become an issue?