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Noob questions: -- What's the boundary between microcode and a VM w/ JIT? Some tidbits I've read, IIRC: Apple Silicon M1 does a surprisingly good job of runn
by specialist 6y ago
Noob questions:
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What's the boundary between microcode and a VM w/ JIT?
Some tidbits I've read, IIRC: Apple Silicon M1 does a surprisingly good job of running a x86 emulator. Some chips now use microcode to support novel ISA extensions. Some chips are adaptive, optimizing hot path ISA instructions. There were special purpose chips for LISP and JVM and probably others. Old school mainframes used to emulate other instruction sets.
Knowing a little bit about JVM, it's JIT, the Java Memory Model...
These (amazing) hardware advances kinda sound like a VM w/ JIT.
So at what point are these chips designed in conjunction with the JIT?
Isn't that kinda what Transmeta was trying to do?
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What can these chips and systems do to improve security? Stuff like tagged data descriptors and buffer overflow protection.
The Burroughs processors had stuff like that. https://en.wikipedia.org/wiki/Burroughs_large_systems_descriptors https://en.wikipedia.org/wiki/Burroughs_large_systems_descri...
Current OSs have a smattering of features.
https://en.wikipedia.org/wiki/Executable_space_protection https://en.wikipedia.org/wiki/Executable_space_protection
Surely more could be done? So I assume someone somewhere is already doing it.
- pjmlp 6y agoCheck CHERI architecture, it is also being supported by ARM and Microsoft. https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/ https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/