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I am posting this as an independent comment. There isn't a "popular" CPU architecture that is 100% PIC for all of the allowed address ranges. There are "optimi
by szc 6y ago
I am posting this as an independent comment.
There isn't a "popular" CPU architecture that is 100% PIC for all of the allowed address ranges. There are "optimizations" the compiler can choose for limited addresses "reaches". Please consider independently compiled libraries that are aggregated into something larger, specifically languages that permit subclassing and inheritance. How can they be moved within an address space?
If there is a hierarchy of address availability this means that ASLR cannot be implemented in a pure way - it must involve runtime fix-ups if the base address changes. If the length of an instruction must change because of the addressing mode, what happens? How can you do ALSR? Do you rewrite all instructions (is there space? was space allocated?) or always use the most expensive address mode?
- johncolanduoni 6y agoThe major architectures & ABIs are all capable of producing and loading fully position independent code. The performance impact varies; for x86_64 and aarch64 instruction pointer relative addressing reduces the number of relocations that are needed by quite a lot. Languages that support subclassing and inheritance don’t represent any special hazard to relocation; ultimately these are built out of data and function symbols that need to be supported even if you’re only compiling C.
- saagarjha 6y agoCompilers know how to generate code that is position independent. Apple requires such code on the iPhone. Therefore, all code that runs is slidable using ASLR. Whether you want to call that "the most expensive address mode" or not (it's really not all that expensive) is up to you. (Also, note that arm64 has fixed-length instructions regardless.)