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What every programmer should know about memory, Part 1 (2007)
- ojnabieoot 6y agoThis should probably have a (2007) in the title, FYI. “What every programmer should know about memory” is a modern classic and at first I thought this was a contemporary article about the paper. As this is the introduction, it might be helpful for some readers to read the rest of the document: https://people.freebsd.org/~lstewart/articles/cpumemory.pdf https://people.freebsd.org/~lstewart/articles/cpumemory.pdf Of course, it’s a 114 page PDF so the first ~20 pages in HTML might be easier to actually finish reading. But this is a fantastic resource and something I really need to take the time to finish (I myself never get past the first 20 pages.....)
- wtallis 6y agoA few observations about what's changed since this was written: The layout shown in Figure 2.1 with a traditional shared Front Side Bus linking CPUs to the northbridge is a long-dead design, having been retired from mainstream products by AMD around 2003 and by Intel around 2008. Since then, the northbridge and memory controllers have been on the CPU die(s) for almost all products. AMD's Zen 2 and later desktop/server CPUs split the northbridge back out to a separate die ("IO die"). All recent x86 processors that I can think of off the top of my head have the PCIe ports provided by the northbridge (which means it's usually part of the CPU die itself). The southbridge is connected to the northbridge/CPU by PCIe (usually four lanes), and part of the southbridge functionality is to act as a PCIe fanout switch. And the terms "northbridge" and "southbridge" have fallen out of common use, largely because the northbridge being on the CPU die was standard practice for both Intel and AMD for over a decade. DDR5 is coming, with the significant change of splitting a DIMM into two separate 32-bit memory channels rather than one 64-bit channel. That allows doubling bandwidth again without the burst length becoming longer than the standard 64-byte cache line size.
- spijdar 6y agoAs an extra data-point outside the x86 world, this is also how modern POWER processors work. POWER9 integrates the PCIe and memory controllers onto the CPU die itself. This is one reason why then open source P9 computers from Raptor exist and have sort-of sane pricing (for such a tiny and niche market) -- a lot of the traditionally hard components are integrated onto the CPU, which makes designing boards around it that much easier vs needing complex chipsets.
- wtallis 6y agoThere are also some POWER processors that move most of the memory controller off-chip, and use a media-agnostic high speed serial link between the CPU and each memory controller chip. That allows for a lot of flexibility in tuning for memory capacity or bandwidth, at the expense of a bit of extra latency. Those CPUs end up having all of their IO in the form of high speed serial links, some used for PCIe, some for NVLink, some for CAPI/OMI.
- monocasa 6y agoYeah, the PCI-e root complex is on the CPU dies, because on x86 at least PCI is cache coherent with the CPUs. They need to get pretty close to the CPUs anyway.
- dau 6y agoActually no. As a programmer I do not need to know anything about exponential capacitor discarge curves and generally anything below VirtualAllocEx().
- gspr 6y agoThat depends a lot on what programming you do.
- ehutch79 6y agoThen the word "every" is inappropriate.
- gspr 6y agoFair point. My bad for not getting it.
- hinkley 6y ago"Every" Is usually tacked onto these sorts of statements by someone who either has to go around cleaning up after other people, or is just generally tired of dealing with the consequences of other people hiding behind ignorance like it's the best shield even invented.
- optimuspaul 6y agodoesn't make it right, they need therapy not lashing out with generalizations
- hinkley 6y agoExternalizing your problems to others isn't right either. Being upset is one of the way we signal that social mores have been violated. Making statements about how it would be good if everyone behaves is another. Rejecting them and saying 'not my problem' is part of the problem.
- dang 6y ago2019 https://news.ycombinator.com/item?id=19302299 https://news.ycombinator.com/item?id=19302299 2017 https://news.ycombinator.com/item?id=15300547 https://news.ycombinator.com/item?id=15300547 2017 https://news.ycombinator.com/item?id=14622861 https://news.ycombinator.com/item?id=14622861 2015 https://news.ycombinator.com/item?id=10601626 https://news.ycombinator.com/item?id=10601626 2015 https://news.ycombinator.com/item?id=9360778 https://news.ycombinator.com/item?id=9360778 2012 https://news.ycombinator.com/item?id=3919429 https://news.ycombinator.com/item?id=3919429 2011 (a bit) https://news.ycombinator.com/item?id=3360188 https://news.ycombinator.com/item?id=3360188 2010 https://news.ycombinator.com/item?id=1511990 https://news.ycombinator.com/item?id=1511990 2007 (a bit) https://news.ycombinator.com/item?id=58627 https://news.ycombinator.com/item?id=58627 https://hn.algolia.com/?dateRange=all&page=0&prefix=true&query=What%20every%20programmer%20should%20know%20about%20memory%20&sort=byDate&type=story&storyText=none https://hn.algolia.com/?dateRange=all&page=0&prefix=true&que...