I thought the 5nm referred to the smallest dimension in a FinFet device. Specifically, the fin: "In theory, the finFET hits its limit when the fin width reaches

I thought the 5nm referred to the smallest dimension in a FinFet device. Specifically, the fin: "In theory, the finFET hits its limit when the fin width reaches 5nm, which is close to where it is today." [0] https://semiengineering.com/5nm-vs-3nm/ https://semiengineering.com/5nm-vs-3nm/