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Does anyone know if you can keep the GPIO "programmable logic" part powered on while putting the cores in low power mode? That could make for some interesting a
by jascii 6y ago
Does anyone know if you can keep the GPIO "programmable logic" part powered on while putting the cores in low power mode? That could make for some interesting applications.
- ramary 6y agoYeah that would be really cool, can imagine this being useful for very simple if this then that logic in dealing with peripherals. e.g. handling a broader range of sensor input and peripheral interrupts without having to turn the core on to do processing.
- jsmith45 6y agoThere are two low power modes. Technically either should be able to let the PIO continue to run. I'll explain all three power modes. NORMAL: You get to select what is clocked here, except for the CPU. CPU will turn off clocking of some of its components if you are running a sleep instruction like WFE/WFI. SLEEP: If both processors are in a sleep state, and no active DMA requests are running it automatically switches to this mode. You can once again configure what components are clocked here. So you could leave say just RTC and PIO powered up. This is less of a true low power mode, and more of just a way to automatically switch to a different set of clocked components if the bus is idle, so as to further reduce power consumption. DORMANT: Ring and crystal oscillators stopped, zero dynamic power used in default configurations. Only a pin or RTC interrupt can wake the system from this state. Note that any externally supplied clocks will continue to be routed, and PLLs will run if not powered down. Thus technically this mode can be used to fully stop the CPUs while letting other accessories run from an external clock. The nominal intended usage is to continue to let the real time clock run, but the PIO could be run too/instead.
- jascii 6y agoThank you for the clear and concise explanation!