The programmable IO peripherals on this part are awesome. They are 8 state machines that can toggle IO at "light speed" - the system clock rate - based on a sma

The programmable IO peripherals on this part are awesome. They are 8 state machines that can toggle IO at "light speed" - the system clock rate - based on a small assembly program, with lots of hardware accelerated FIFOs and shifting. The datasheet for the accelerators is pretty rich and well written with a ton of examples (an oddity for typically poorly-documented state machines - looking at you, i.MX DMA). Someone had fun with it (and it also pretty clearly makes the point that these are not general purpose coprocessor accelerators): > Although not designed for computation, PIO is quite likely Turing-complete, and it is conjectured that it could run DOOM, given a sufficiently high clock speed. [...] A full 32-bit addition takes only around one minute at 125 MHz. > // Pop quiz: how many additions does the processor do when calling this function [to set up the PIO addition program] Lol.