Intel 14nm is 42/70/52 (fin/cgp/mmp) with a 7.5 track height. HD stamBitcell is 0.05um2 Very restrictive design rules Tsmc 5nm is 27/54/36 with a 6T and 7.T op

Intel 14nm is 42/70/52 (fin/cgp/mmp) with a 7.5 track height. HD stamBitcell is 0.05um2 Very restrictive design rules Tsmc 5nm is 27/54/36 with a 6T and 7.T option. More open design rules. HD SRAM cell is about 0.025um2. This is almost exactly what you expect for 1 node of litho scaling. The more difficult part is that the designs and related process optimizations for intel are different.