> A naive model might only consider memory accesses and might assume accessing an adjacent element is free. Really depends on the level of naivety and the defi

> A naive model might only consider memory accesses and might assume accessing an adjacent element is free. Really depends on the level of naivety and the definition of "free". It would be less insane to write that: accessing an adjacent element has a negligible overhead if the data must be loaded from RAM and there are some OOO bubbles to execute the adjacent loads. If some data are in cache the free adjacent load claim immediately is less probable. If the latency of a single load is already filled by OOO, adding another one will obviously have an impact. If the workload is highly regular you can get quite chaotic results when making even some trivial changes (even sometimes when aligning the .text differently!) And the proposed microbenchmark is way too simplistic: it is possible that it saturates some units in some processors and completely different units in others... Is the impact of an extra adjacent load from RAM likely to be negligible in a real world workloads? Absolutely. With precise characteristics depending on your exact model / current freq / other memory pressure at this time, etc.