yosys with yosys show command can do it for Verilog: http://www.clifford.at/yosys/files/yosys_appnote_011_design_investigation.pdf http://www.clifford.at/yosys/

yosys with yosys show command can do it for Verilog: http://www.clifford.at/yosys/files/yosys_appnote_011_design_investigation.pdf http://www.clifford.at/yosys/files/yosys_appnote_011_design_... I found it really helpful to see what a chunk of Verilog code would look like after synthesis. There is an online version at here: http://www.clifford.at/yosys/nogit/YosysJS/snapshot/demo02.html http://www.clifford.at/yosys/nogit/YosysJS/snapshot/demo02.h... which uses YosysJS. Hopefully someone can port Compiler Explorer UI to this