5 ms·
Does anyone know why ECC memory requires the CPU to support it? Naively, I can understand why error reporting has dependencies on other parts of the system, bu
by FartyMcFarter 6y ago
Does anyone know why ECC memory requires the CPU to support it?
Naively, I can understand why error reporting has dependencies on other parts of the system, but it would seem possible for error correction to work transparently.
- TomVDB 6y agoI think the memory just provides additional storage bits to detect the issue, but doesn't contain the logic. This is in line with all technical parameters of DRAM: everything must be as cheap as possible, and all the difficult parts are moved to the memory controller. Which is the right thing to do, because you can share one memory controller with multiple DRAM chips.
- wmf 6y agoHistorically the detection and correction is performed in the memory controller not the DRAM.
- toast0 6y agoAs implemented today, ECC is a feature of the memory controller. You need special ram, because instead of 8 parallel rams per bank, you need 9, and all the extra data lines to go to the controller. Modern CPUs have integrated memory controllers, so that's why the CPU needs to support it. Correction without reporting isn't great; anyway, you need a reporting mechanism for uncorrectable errors, or all you've done is ensure any memory errors you do experience are worse.
- fomine3 6y agoError correcting and reporting is better, but even only correcting is better than non-ECC. I wonder this compromise could be accepted by Intel.
- deleted 6y ago[deleted]