3 ms·
From what I've read it seems to be different from Intel's UMA. It's cache-friendly single pool of memory directly accessible from different cores of the SoC: CP
by viktorcode 6y ago
From what I've read it seems to be different from Intel's UMA. It's cache-friendly single pool of memory directly accessible from different cores of the SoC: CPU, GPU, NPU etc. Since there's no division of RAM between different parts of the SoC, copying operations aren't needed.
- Someone 6y agoI also read somewhere that they made sure the data formats used by the various modules are identical. Without that, you have to copy data to do format conversions. I don’t know how much of a problem that is in general, though.