> For example, in RISC-V, the bits are 'jumbled up' when encoding constants; the argument is it, ultimately, makes the processing faster (due to the way sign-ex

> For example, in RISC-V, the bits are 'jumbled up' when encoding constants; the argument is it, ultimately, makes the processing faster (due to the way sign-extension works). It's not just sign-extension. You can naïvely gather several immediate bits without knowing what the opcode is, and the source/destination register IDs are also always in the same place. It does help to simplify the digital design, because your decoding logic can pluck out a few fields with no state dependencies. I had the same response to the odd instruction format at first, but it's grown on me over time. >And recently, RV supports big endian. Why? Probably to support networking equipment. They still strongly recommend using little-endian.