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Man, this guy has some great articles. http://www.chrisfenton.com/cray-1-digital-archeology/ http://www.chrisfenton.com/cray-1-digital-archeology/ http://www.
by Nomokis 6y ago
Man, this guy has some great articles.
http://www.chrisfenton.com/cray-1-digital-archeology/ http://www.chrisfenton.com/cray-1-digital-archeology/
http://www.chrisfenton.com/cos-recovery/ http://www.chrisfenton.com/cos-recovery/
I just wish he'd made higher resolution pictures.
He's also seriously hardcore (or maybe I feel out of depth because I'm a software guy):
> I built a robot that would manually move the head forward 1/5200th of an inch at a time (there are 400 data tracks per inch, so this gives me a whopping 13 steps per data track!), while a high-speed analog-to-digital converter would take the analog signal straight from the drive’s read amplifier and buffer it into an FPGA at a blistering 80 million samples-per-second (like I said earlier, the theme here was overkill…the data was only changing at ~10 MHz or so)
Related:
http://www.modularcircuits.com/blog/articles/the-cray-files/ http://www.modularcircuits.com/blog/articles/the-cray-files/
- mhh__ 6y agoVery nice. The FPGA thing isn't that inaccessible to normies like us (i.e. some FPGA Dev boards will easily cost thousands and thousands), but the ecosystem is a complete clusterfuck so getting started is the hard bit. Obviously you need to know electronics too but 80MSPS will let you get away with a lot (The term is signal integrity) of bad circuitry (as I can attest to...). Verilog isn't too bad as long as you treat it as a description of a circuit (in a language from the past, not even mentioning VHDL...)
- fentonc 6y agoLol - the 'overkill' approach was mostly one of expediency, since I had spent most of the summer I had to work on this project just trying to get my hands on the disk drive and then powering it on without blowing a fuse. I only had 2-3 weeks to throw everything together, so the 'robot' was basically the Z-stage of a Makerbot 3D printer with some acrylic widgets to push the read-head, then the signal was fed into an analog comparator chip and then into a shift register in my FPGA board. The craziest part is that it worked, and I was able to recover the data!