We are currently discussing a number of ideas for a followup project in addition to creating an FPGA version... I'm currently digging through the 1992/2005 edi

We are currently discussing a number of ideas for a followup project in addition to creating an FPGA version... I'm currently digging through the 1992/2005 edition of the Project Oberon book (for the National Semiconductor 32k-based Ceres workstations from ETHZ - https://people.inf.ethz.ch/wirth/ProjectOberon1992.pdf https://people.inf.ethz.ch/wirth/ProjectOberon1992.pdf). The Ceres Oberon version had a number of additional features, e.g. it could use the MMU for memory protection, which the RISC5 version doesn't support.