I don't think you quite appreciate how clever RISC-V has been designed. RISC-V is very well designed to be used with both complex and simple micro-architectures

I don't think you quite appreciate how clever RISC-V has been designed. RISC-V is very well designed to be used with both complex and simple micro-architectures. By combining instruction compression and macro and micro-fusion you get everything you claim only x86 and ARM can do an more. Here is a proper explanation of how: https://erik-engheim.medium.com/the-genius-of-risc-v-microprocessors-b19d735abaa6 https://erik-engheim.medium.com/the-genius-of-risc-v-micropr...