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> A significant portion of Apple's lead came from buying exclusivity on TSMC's 5nm process It's hard to estimate how much of Apple's advantage came from the 5n

by leecb 6y ago

> A significant portion of Apple's lead came from buying exclusivity on TSMC's 5nm process It's hard to estimate how much of Apple's advantage came from the 5nm process, but we can get a guess by comparing the A13 and A14. One of the biggest differences between last year's A13 and this year's A14 is the 5nm process (vs 7nm+). The performance increase seems to be on the order of 15% [1], and Apple was able to fit in a lot more transistors- 11.8B vs. 8.5B, though we don't know how many of those transistors were spent on the CPU, and how many were spent in other areas like the GPU or ISP. Seems like the additional transistors and lower power consuption were used to increase performance in a bunch of ways- higher clock speeds, more cache, and a bigger reorder buffer being the obvious improvements. Perhaps AMD can pull off a similar improvement when they switch processes. [1] Spec2006 numbers from https://www.anandtech.com/show/16192/the-iphone-12-review/2 https://www.anandtech.com/show/16192/the-iphone-12-review/2

qiqitori 6y ago
How much of that added density is used for what kind of performance and how much is used to prioritize efficiency is up to the chip designers -- for the M1 you get a couple cores that focus on performance and a couple cores that focus on efficiency, plus a lot of area for the GPU and a not insignificant area for the mysterious (to me at least) 16-core neural engine (aside: I wonder if e.g. the graphics pipeline is able to make use of that, as it seems like it should be able to perform matrix multiplications, and it'd be a bit of a waste if that just sat there most of the time). So you'll probably see some variation but each time a process is scaled down to 0.7x of the previous size, you'll get smaller transistors that use less power individually and you could expect a "40% performance boost for the same amount of power and a 50% reduction in area" (according to https://semiengineering.com/5nm-vs-3nm/ https://semiengineering.com/5nm-vs-3nm/) 90 nm (2003) * 0.7 = 63 nm 65 nm (2005) * 0.7 = 45.5 nm 45 nm (2007) * 0.7 = 31.5 nm 32 nm (2009) * 0.7 = 22.4 nm 22 nm (2012) * 0.7 = 15.4 nm 14 nm (2014) * 0.7 = 9.8 nm 10 nm (2016) * 0.7 = 7 nm 7 nm (2018) * 0.7 = 4.9 nm 5 nm (2020) * 0.7 = 3.5 nm To me, it's a bit of a miracle that Intel is still able to sort of compete on mostly 14 nm nodes, but maybe that's because "node size" basically just means "smallest feature size", and their 14 nm or new 10 nm process is a little better than e.g. competing 14/10 nm processes, or maybe their chip designs just prioritize different things that have a decent real world effect (e.g. Intel CPUs have AVX-512, but AMD CPUs don't).
- ksec 6y ago
  In case anyone is wondering. 1. The 0.7x comes with 50% reduction in area. Where if you times 0.7 by 0.7 you get 0.49. 2. The original naming of Intel 14nm was actually 15nm. But Intel changed it which was part of the reason why it caused delays. 3. And Intel original 10nm naming was 11nm. 4. The node naming now mostly follows TSMC, the node after 3nm is 2nm, then 1.4nm, then 1nm, then 0.8nm.
emn13 6y ago
minor correction: the geometric mean of the uplift of the specfp and specint benchmarks is 21.3%, which is perhaps notably better than 15% (up to interpretation, that). The geekbench numbers comparing the iphone 12 pro to iphone 11 pro average to around 19% difference: https://browser.geekbench.com/ios-benchmarks/ https://browser.geekbench.com/ios-benchmarks/. A few caveats: A compiler change made made the libquantum uplift (a part of the spec benchmark) huge, and non-representative of hardware changes. Conversely, the geekbench 5 multicore results are actually worse for the iphone 12 pro vs. 12; hinting that they're over-boosting the iphone 12 pro, so peak perf is likely actually a little better (from the hardware's perspective, not that an app can do much about it). In any case, let's call it a 20% uplift with the same amount of threads, very respectable. Another caveat: AMD may not be able to get the same 20% uplift from 5nm that apple does. Without any expertise in this matter I can only repeat what others claim, but I've heard people say that it's hard to make x86 wider (i.e extract more ILP) because the instructions are variable length, making lookahead more difficult. I guess we'll see next year with zen4 if that's true!

by leecb 6y ago

qiqitori 6y ago

How much of that added density is used for what kind of performance and how much is used to prioritize efficiency is up to the chip designers -- for the M1 you get a couple cores that focus on performance and a couple cores that focus on efficiency, plus a lot of area for the GPU and a not insignificant area for the mysterious (to me at least) 16-core neural engine (aside: I wonder if e.g. the graphics pipeline is able to make use of that, as it seems like it should be able to perform matrix multiplications, and it'd be a bit of a waste if that just sat there most of the time). So you'll probably see some variation but each time a process is scaled down to 0.7x of the previous size, you'll get smaller transistors that use less power individually and you could expect a "40% performance boost for the same amount of power and a 50% reduction in area" (according to https://semiengineering.com/5nm-vs-3nm/ https://semiengineering.com/5nm-vs-3nm/) 90 nm (2003) * 0.7 = 63 nm 65 nm (2005) * 0.7 = 45.5 nm 45 nm (2007) * 0.7 = 31.5 nm 32 nm (2009) * 0.7 = 22.4 nm 22 nm (2012) * 0.7 = 15.4 nm 14 nm (2014) * 0.7 = 9.8 nm 10 nm (2016) * 0.7 = 7 nm 7 nm (2018) * 0.7 = 4.9 nm 5 nm (2020) * 0.7 = 3.5 nm To me, it's a bit of a miracle that Intel is still able to sort of compete on mostly 14 nm nodes, but maybe that's because "node size" basically just means "smallest feature size", and their 14 nm or new 10 nm process is a little better than e.g. competing 14/10 nm processes, or maybe their chip designs just prioritize different things that have a decent real world effect (e.g. Intel CPUs have AVX-512, but AMD CPUs don't).

ksec 6y ago
In case anyone is wondering. 1. The 0.7x comes with 50% reduction in area. Where if you times 0.7 by 0.7 you get 0.49. 2. The original naming of Intel 14nm was actually 15nm. But Intel changed it which was part of the reason why it caused delays. 3. And Intel original 10nm naming was 11nm. 4. The node naming now mostly follows TSMC, the node after 3nm is 2nm, then 1.4nm, then 1nm, then 0.8nm.

emn13 6y ago

minor correction: the geometric mean of the uplift of the specfp and specint benchmarks is 21.3%, which is perhaps notably better than 15% (up to interpretation, that). The geekbench numbers comparing the iphone 12 pro to iphone 11 pro average to around 19% difference: https://browser.geekbench.com/ios-benchmarks/ https://browser.geekbench.com/ios-benchmarks/. A few caveats: A compiler change made made the libquantum uplift (a part of the spec benchmark) huge, and non-representative of hardware changes. Conversely, the geekbench 5 multicore results are actually worse for the iphone 12 pro vs. 12; hinting that they're over-boosting the iphone 12 pro, so peak perf is likely actually a little better (from the hardware's perspective, not that an app can do much about it). In any case, let's call it a 20% uplift with the same amount of threads, very respectable. Another caveat: AMD may not be able to get the same 20% uplift from 5nm that apple does. Without any expertise in this matter I can only repeat what others claim, but I've heard people say that it's hard to make x86 wider (i.e extract more ILP) because the instructions are variable length, making lookahead more difficult. I guess we'll see next year with zen4 if that's true!