The paper/presentation you link to is comparing 32-bit ARM with Thumb and RISC-V. This is mostly relevant to embedded processors, and my understanding is ARM an

The paper/presentation you link to is comparing 32-bit ARM with Thumb and RISC-V. This is mostly relevant to embedded processors, and my understanding is ARM and RISC-V is somewhat equal there. But for 64-bit, ARM has dropped support for Thumb, while RISC-V still supports compressed instructions. In that case, RISC-V is more dense than ARM. I can't find the numbers for that right now, but I read it just yesterday so I'm pretty sure I remember correctly. Also keep in mind that Thumb is a mode that the ARM CPU has to switch to, while RISC-V compressed instructions can be mixed with normal instructions.