4 ms·
Original author speaking. If you actually read the blog (unbearable ordeal, I understand) you would know that Lisp (in available incarnations on available hard
by asciilifeform 15y ago
Original author speaking.
If you actually read the blog (unbearable ordeal, I understand) you would know that Lisp (in available incarnations on available hardware) is not enough:
http://www.loper-os.org/?p=284 http://www.loper-os.org/?p=284
Let's see how much of an OS and hardware architecture you can design in several years - without using a single line of code written by another person. Starting with the NAND gate - because that is where you will have to start if you truly intend to avoid recapitulating the mistakes of the past three decades.
There was no sequel to the bootloader - I have been occupied with reverse-engineering the bitstream format of a major brand of FPGA (no naming names) in order to dispense with the proprietary x86 toolchain (and eventually with the abomination called Verilog.)
Publishing incremental progress in bite-sized chunks is vastly over-rated. It wastes everyone's time and contributes to the proliferation of hideously ragtag systems reminiscent of "Junkyard Wars" (aka much of the software industry.)
Punditry, on the other hand, is a relaxing and inexpensive hobby. The hosting bill for the past year of the blog was around $30.
Most of my time is spent working on unrelated efforts which I am not at liberty to make public. Currently, they leave precious-little time and energy for my long-term (think lifetime) project.
Feel free, of course, to imagine that I am an idler sitting in an armchair drinking the days away, if it makes you happy.
- troutwine 15y agoClearly you are a man of strong opinion. You are also needlessly rude and insufferably self-important. I apologize that you took my critique so personally, without, of course, apologizing for the critique itself. May you succeed in your ambition.
- wnoise 15y ago> I have been occupied with reverse-engineering the bitstream format of a major brand of FPGA (no naming names) in order to dispense with the proprietary x86 toolchain (and eventually with the abomination called Verilog.) I sincerely hope you succeed. Verilog needs to be killed and replaced with something saner.